Design of 2.1GHz CMOS Low Noise Amplifier
摘要
This paper discusses the design of a fully differential 2.1GHz CMOS low noise amplifier using the TSMC 0.25μm CMOS process. Intended for use in 3G, the low noise amplifier is fully integrated and without off-chip components. The design uses an LC tank to replace a large inductor to achieve a smaller die area, and uses shielded pad capacitances to improve the noise performance. This paper also presents evaluation results of the design.
引用本文(GB/T 7714)
Meng CHU. Design of 2.1GHz CMOS Low Noise Amplifier[J]. 中国邮电高校学报:英文版, 2006.
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