容工艺偏差的低偏斜层次化时钟网络设计
摘要
In this paper, a novel hierarchical clock distribution network is implemented with regard to the new characteristics of very deep sub-micro process. The clock distribution network is constructed with a mixed clock structure based on a global H-tree network and regional Mesh network. The regional Mesh network, which is also known as a local Mesh grid, is different from conventional global Mesh networks. Experiments indicate that this clock distribution network has a tiny clock skew and a high tolerance for process variations. The clock skew is within 10 ps. The impact of process variations on clock skew is in the ratio of 10%. These features are useful for timing sequence optimization of high-performance micro process cores.
引用本文（GB/T 7714）
Xiao Wang, Ximing Ke. 容工艺偏差的低偏斜层次化时钟网络设计[J]. Scientia Sinica Informationis, 2015.
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